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pios_bmx055_priv.h
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1 
13 /*
14  * This program is free software; you can redistribute it and/or modify
15  * it under the terms of the GNU General Public License as published by
16  * the Free Software Foundation; either version 3 of the License, or
17  * (at your option) any later version.
18  *
19  * This program is distributed in the hope that it will be useful, but
20  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
21  * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
22  * for more details.
23  *
24  * You should have received a copy of the GNU General Public License along
25  * with this program; if not, see <http://www.gnu.org/licenses/>
26  */
27 
28 #ifndef PIOS_BMX055_PRIV_H
29 #define PIOS_BMX055_PRIV_H
30 
31 #include "pios_bmx055.h"
32 
33 #define BMX055_REG_ACC_CHIPID 0x00
34 #define BMX055_VAL_ACC_CHIPID 0xfa
35 #define BMX055_REG_ACC_X_LSB 0x02
36 #define BMX055_REG_ACC_X_MSB 0x03
37 #define BMX055_REG_ACC_Y_LSB 0x04
38 #define BMX055_REG_ACC_Y_MSB 0x05
39 #define BMX055_REG_ACC_Z_LSB 0x06
40 #define BMX055_REG_ACC_Z_MSB 0x07
41 #define BMX055_REG_ACC_TEMP 0x08
42 #define BMX055_ACC_TEMP_OFFSET 23
43 #define BMX055_REG_ACC_INT_STATUS_0 0x09
44 #define BMX055_REG_ACC_INT_STATUS_1 0x0a
45 #define BMX055_REG_ACC_INT_STATUS_2 0x0b
46 #define BMX055_REG_ACC_INT_STATUS_3 0x0c
47 #define BMX055_REG_ACC_FIFO_STATUS 0x0e
48 #define BMX055_REG_ACC_PMU_RANGE 0x0f
49 #define BMX055_VAL_ACC_PMU_RANGE_2G 0x03
50 #define BMX055_VAL_ACC_PMU_RANGE_4G 0x05
51 #define BMX055_VAL_ACC_PMU_RANGE_8G 0x08
52 #define BMX055_VAL_ACC_PMU_RANGE_16G 0x0c
53 #define BMX055_REG_ACC_PMU_BW 0x10
54 #define BMX055_VAL_ACC_PMU_BW_7HZ81 0x08
55 #define BMX055_VAL_ACC_PMU_BW_15HZ63 0x09
56 #define BMX055_VAL_ACC_PMU_BW_31HZ25 0x0a
57 #define BMX055_VAL_ACC_PMU_BW_62HZ5 0x0b
58 #define BMX055_VAL_ACC_PMU_BW_125HZ 0x0c
59 #define BMX055_VAL_ACC_PMU_BW_250HZ 0x0d
60 #define BMX055_VAL_ACC_PMU_BW_500HZ 0x0e
61 #define BMX055_VAL_ACC_PMU_BW_1KHZ 0x0f
62 #define BMX055_REG_ACC_PMU_LPW 0x11
63 #define BMX055_VAL_ACC_PMU_LPW_NORMAL 0x00
64 #define BMX055_REG_ACC_PMU_LOW_POWER 0x12
65 #define BMX055_REG_ACC_ACCD_HBW 0x13
66 #define BMX055_VAL_ACC_ACCD_HBW_NORMAL 0x00 /* filtered data, shadowed */
67 #define BMX055_REG_ACC_BGW_SOFTRESET 0x14
68 #define BMX055_VAL_ACC_BGW_SOFTRESET_REQ 0xb6 /* value to trigger a reset */
69  /* 3ms delay required afterwards */
70 #define BMX055_REG_ACC_INT_EN_0 0x16
71 #define BMX055_REG_ACC_INT_EN_1 0x17
72 #define BMX055_REG_ACC_INT_EN_2 0x18
73 #define BMX055_REG_ACC_INT_MAP_0 0x19
74 #define BMX055_REG_ACC_INT_MAP_1 0x1a
75 #define BMX055_REG_ACC_INT_MAP_2 0x1b
76 #define BMX055_REG_ACC_INT_SRC 0x1e
77 #define BMX055_REG_ACC_INT_OUT_CTRL 0x20
78 #define BMX055_REG_ACC_INT_RST_LATCH 0x21
79 #define BMX055_REG_ACC_INT_0 0x22
80 #define BMX055_REG_ACC_INT_1 0x23
81 #define BMX055_REG_ACC_INT_2 0x24
82 #define BMX055_REG_ACC_INT_3 0x25
83 #define BMX055_REG_ACC_INT_4 0x26
84 #define BMX055_REG_ACC_INT_5 0x27
85 #define BMX055_REG_ACC_INT_6 0x28
86 #define BMX055_REG_ACC_INT_7 0x29
87 #define BMX055_REG_ACC_INT_8 0x2a
88 #define BMX055_REG_ACC_INT_9 0x2b
89 #define BMX055_REG_ACC_INT_A 0x2c
90 #define BMX055_REG_ACC_INT_B 0x2d
91 #define BMX055_REG_ACC_INT_C 0x2e
92 #define BMX055_REG_ACC_INT_D 0x2f
93 #define BMX055_REG_ACC_FIFO_CONFIG_0 0x30
94 #define BMX055_REG_ACC_PMU_SELF_TEST 0x32
95 #define BMX055_REG_ACC_TRIM_NVM_CTRL 0x33
96 #define BMX055_REG_ACC_BGW_SPI3_WDT 0x34
97 #define BMX055_REG_ACC_OFC_CTRL 0x36
98 #define BMX055_REG_ACC_OFC_SETTING 0x37
99 #define BMX055_REG_ACC_OFC_OFFSET_X 0x38
100 #define BMX055_REG_ACC_OFC_OFFSET_Y 0x39
101 #define BMX055_REG_ACC_OFC_OFFSET_Z 0x3a
102 #define BMX055_REG_ACC_TRIM_GP0 0x3b
103 #define BMX055_REG_ACC_TRIM_GP1 0x3c
104 #define BMX055_REG_ACC_FIFO_CONFIG_1 0x3e
105 #define BMX055_VAL_ACC_FIFO_CONFIG_1_BYPASS 0x00
106 #define BMX055_REG_ACC_FIFO_DATA 0x3f
107 
108 #define BMX055_REG_GYRO_CHIPID 0x00
109 #define BMX055_VAL_GYRO_CHIPID 0x0f
110 #define BMX055_REG_GYRO_X_LSB 0x02
111 #define BMX055_REG_GYRO_X_MSB 0x03
112 #define BMX055_REG_GYRO_Y_LSB 0x04
113 #define BMX055_REG_GYRO_Y_MSB 0x05
114 #define BMX055_REG_GYRO_Z_LSB 0x06
115 #define BMX055_REG_GYRO_Z_MSB 0x07
116 #define BMX055_REG_GYRO_INT_STATUS_0 0x09
117 #define BMX055_REG_GYRO_INT_STATUS_1 0x0A
118 #define BMX055_REG_GYRO_INT_STATUS_2 0x0B
119 #define BMX055_REG_GYRO_INT_STATUS_3 0x0C
120 #define BMX055_REG_GYRO_FIFO_STATUS 0x0E
121 #define BMX055_REG_GYRO_RANGE 0x0F
122 #define BMX055_VAL_GYRO_RANGE_2000DPS 0x00
123 #define BMX055_VAL_GYRO_RANGE_1000DPS 0x01
124 #define BMX055_VAL_GYRO_RANGE_500DPS 0x02
125 #define BMX055_VAL_GYRO_RANGE_250DPS 0x03
126 #define BMX055_VAL_GYRO_RANGE_125DPS 0x04
127 #define BMX055_REG_GYRO_BW 0x10
128 #define BMX055_VAL_GYRO_BW_47HZ 0x03 /* 400Hz ODR */
129 #define BMX055_VAL_GYRO_BW_116HZ 0x02 /* 1KHz ODR */
130 #define BMX055_VAL_GYRO_BW_230HZ 0x01 /* 2KHz ODR */
131 #define BMX055_VAL_GYRO_BW_UNFILT 0x00 /* 2KHz ODR */
132 #define BMX055_REG_GYRO_LPM1 0x11
133 #define BMX055_REG_GYRO_LPM2 0x12
134 #define BMX055_REG_GYRO_RATE_HBW 0x13
135 #define BMX055_REG_GYRO_BGW_SOFTRESET 0x14
136 #define BMX055_VAL_GYRO_BGW_SOFTRESET_REQ 0xb6 /* Takes 30ms! Typical! */
137 #define BMX055_REG_GYRO_INT_EN_0 0x15
138 #define BMX055_REG_GYRO_INT_EN_1 0x16
139 #define BMX055_REG_GYRO_INT_MAP_0 0x17
140 #define BMX055_REG_GYRO_INT_MAP_1 0x18
141 #define BMX055_REG_GYRO_INT_MAP_2 0x19
142 #define BMX055_REG_GYRO_INTERRUPTS_SELECTABLE_DATA_SOURCE 0x1A
143 #define BMX055_REG_GYRO_FAST_OFFSET_COMPENSATION_MOTION_THRESHOLD 0x1B
144 #define BMX055_REG_GYRO_MOTION_INT 0x1C
145 #define BMX055_REG_GYRO_FIFO_WM_INT 0x1E
146 #define BMX055_REG_GYRO_INT_RST_LATCH 0x21
147 #define BMX055_REG_GYRO_HIGH_TH_X 0x22
148 #define BMX055_REG_GYRO_HIGH_DUR_X 0x23
149 #define BMX055_REG_GYRO_HIGH_TH_Y 0x24
150 #define BMX055_REG_GYRO_HIGH_DUR_Y 0x25
151 #define BMX055_REG_GYRO_HIGH_TH_Z 0x26
152 #define BMX055_REG_GYRO_HIGH_DUR_Z 0x27
153 #define BMX055_REG_GYRO_SOC 0x31
154 #define BMX055_REG_GYRO_A_FOC 0x32
155 #define BMX055_REG_GYRO_TRIM_NVM_CTRL 0x33
156 #define BMX055_REG_GYRO_BGW_SPI3_WDT 0x34
157 #define BMX055_REG_GYRO_OFC1 0x36
158 #define BMX055_REG_GYRO_OFC2 0x37
159 #define BMX055_REG_GYRO_OFC3 0x38
160 #define BMX055_REG_GYRO_OFC4 0x39
161 #define BMX055_REG_GYRO_TRIM_GP0 0x3A
162 #define BMX055_REG_GYRO_TRIM_GP1 0x3B
163 #define BMX055_REG_GYRO_BIST 0x3C
164 #define BMX055_REG_GYRO_FIFO_CONFIG_0 0x3D
165 #define BMX055_REG_GYRO_FIFO_CONFIG_1 0x3E
166 #define BMX055_REG_GYRO_FIFO_DATA 0x3F
167 
168 #endif /* PIOS_BMX055_PRIV_H */
169