pios_internal_adc_light.c

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/* 
 * This program is free software; you can redistribute it and/or modify 
 * it under the terms of the GNU General Public License as published by 
 * the Free Software Foundation; either version 3 of the License, or 
 * (at your option) any later version.
 * 
 * This program is distributed in the hope that it will be useful, but 
 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 
 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 
 * for more details.
 * 
 * You should have received a copy of the GNU General Public License along 
 * with this program; if not, see <http://www.gnu.org/licenses/>
 */

#include <pios_internal_adc_priv.h>

#if defined(PIOS_INCLUDE_ADC)

static intptr_t PIOS_INTERNAL_ADC_PinConfig(uint32_t internal_adc_id);
static void PIOS_INTERNAL_DMAConfig(uintptr_t internal_adc_id);
intptr_t PIOS_INTERNAL_ADC_LIGHT_Init(uint32_t *internal_adc_id,
                const struct pios_internal_adc_cfg *cfg,
                uint16_t number_of_used_pins);
static void PIOS_INTERNAL_ADC_Converter_Config(uintptr_t internal_adc_id);
static intptr_t PIOS_INTERNAL_ADC_PinGet(uint32_t internal_adc_id, uint32_t pin);
static uint8_t PIOS_INTERNAL_ADC_NumberOfChannels(uintptr_t internal_adc_id);
static float PIOS_INTERNAL_ADC_LSB_Voltage(uintptr_t internal_adc_id);

const struct pios_adc_driver pios_internal_adc_driver = {
                .get_pin = PIOS_INTERNAL_ADC_PinGet,
                .number_of_channels = PIOS_INTERNAL_ADC_NumberOfChannels,
                .lsb_voltage = PIOS_INTERNAL_ADC_LSB_Voltage,
};

// Private types
enum pios_internal_adc_dev_magic {
        PIOS_INTERNAL_ADC_DEV_MAGIC = 0xBD37C124,
};

struct pios_internal_adc_dev {
        const struct pios_internal_adc_cfg *cfg;
        uint16_t number_of_used_pins;
        uint16_t dma_transfer_size;
        volatile uint16_t *raw_data_buffer;
        enum pios_internal_adc_dev_magic magic;
};

static bool PIOS_INTERNAL_ADC_validate(struct pios_internal_adc_dev * dev)
{
        if(dev == NULL)
                return false;

        return (dev->magic == PIOS_INTERNAL_ADC_DEV_MAGIC);
}

static struct pios_internal_adc_dev * PIOS_INTERNAL_ADC_Allocate()
{
        struct pios_internal_adc_dev *adc_dev = (struct pios_internal_adc_dev *)PIOS_malloc(sizeof(*adc_dev));
        if(!adc_dev)
                return (NULL );
        adc_dev->magic = PIOS_INTERNAL_ADC_DEV_MAGIC;
        return (adc_dev);
}

static intptr_t PIOS_INTERNAL_ADC_PinConfig(uint32_t internal_adc_id)
{
        struct pios_internal_adc_dev * adc_dev = (struct pios_internal_adc_dev *) internal_adc_id;
        if(!PIOS_INTERNAL_ADC_validate(adc_dev)) {
                return -1;
        }

        /* Setup analog pins */
        GPIO_InitTypeDef GPIO_InitStructure;
        GPIO_StructInit(&GPIO_InitStructure);
        GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
        GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AIN;

        for(int32_t i = 0; i < adc_dev->number_of_used_pins; i++) {
                if(adc_dev->cfg->adc_pins[i].port == NULL )
                        continue;
                // This driver only supports ADC1
                if(!adc_dev->cfg->adc_pins[i].is_master_channel)
                        return -2;
                GPIO_InitStructure.GPIO_Pin = adc_dev->cfg->adc_pins[i].pin;
                GPIO_Init(adc_dev->cfg->adc_pins[i].port, (GPIO_InitTypeDef*) &GPIO_InitStructure);
        }

        return 0;
}
static void PIOS_INTERNAL_DMAConfig(uintptr_t internal_adc_id)
{
        struct pios_internal_adc_dev * adc_dev = (struct pios_internal_adc_dev *) internal_adc_id;
        if(!PIOS_INTERNAL_ADC_validate(adc_dev)) {
                return;
        }

        /* Disable interrupts */
        DMA_ITConfig(adc_dev->cfg->dma.rx.channel, adc_dev->cfg->dma.irq.flags, DISABLE);

        /* Configure DMA channel */
        DMA_DeInit(adc_dev->cfg->dma.rx.channel);

        RCC_AHBPeriphClockCmd(adc_dev->cfg->dma.ahb_clk, ENABLE);

        DMA_InitTypeDef DMAInit = adc_dev->cfg->dma.rx.init;

        DMAInit.DMA_PeripheralBaseAddr = (uint32_t) &adc_dev->cfg->adc_dev_master->DR;
        DMAInit.DMA_MemoryBaseAddr = (uint32_t) adc_dev->raw_data_buffer;
        DMAInit.DMA_BufferSize = adc_dev->dma_transfer_size;
        DMAInit.DMA_DIR = DMA_DIR_PeripheralSRC;
        DMAInit.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
        DMAInit.DMA_MemoryInc = DMA_MemoryInc_Enable;
        DMAInit.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
        DMAInit.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
        DMAInit.DMA_Mode = DMA_Mode_Circular;
        DMAInit.DMA_M2M = DMA_M2M_Disable;

        DMA_Init(adc_dev->cfg->dma.rx.channel, &DMAInit); /* channel is actually stream ... */

        /* enable DMA */
        DMA_Cmd(adc_dev->cfg->dma.rx.channel, ENABLE);
}
static void PIOS_INTERNAL_ADC_Converter_Config(uintptr_t internal_adc_id)
{
        struct pios_internal_adc_dev * adc_dev = (struct pios_internal_adc_dev *) internal_adc_id;

        ADC_DeInit(adc_dev->cfg->adc_dev_master);

        if(adc_dev->cfg->adc_dev_master == ADC1)
                RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1, ENABLE);
        else
                return;

        RCC_ADCCLKConfig(RCC_PCLK2_Div8);

        for(int32_t i = 0; i < adc_dev->number_of_used_pins; i++) {
                ADC_RegularChannelConfig(ADC1, adc_dev->cfg->adc_pins[i].adc_channel,
                                         i + 1, ADC_SampleTime_239Cycles5);
        }

        ADC_InitTypeDef ADC_InitStructure;
        ADC_StructInit(&ADC_InitStructure);

        ADC_InitStructure.ADC_Mode = ADC_Mode_Independent;
        ADC_InitStructure.ADC_ScanConvMode = ENABLE;
        ADC_InitStructure.ADC_ContinuousConvMode = ENABLE;
        ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_None;
        ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right;
        ADC_InitStructure.ADC_NbrOfChannel = adc_dev->number_of_used_pins;

        ADC_Init(adc_dev->cfg->adc_dev_master, &ADC_InitStructure);

        ADC_Cmd(adc_dev->cfg->adc_dev_master, ENABLE);

        PIOS_DELAY_WaituS(10);
        ADC_ResetCalibration(adc_dev->cfg->adc_dev_master);
        while(ADC_GetResetCalibrationStatus(adc_dev->cfg->adc_dev_master));
        ADC_StartCalibration(adc_dev->cfg->adc_dev_master);
        while (ADC_GetCalibrationStatus(adc_dev->cfg->adc_dev_master));

        /* Enable ADC->DMA request */
        ADC_DMACmd(adc_dev->cfg->adc_dev_master, ENABLE);

        PIOS_DELAY_WaituS(10);
        ADC_SoftwareStartConvCmd(adc_dev->cfg->adc_dev_master, ENABLE);
}

intptr_t PIOS_INTERNAL_ADC_LIGHT_Init(uint32_t *internal_adc_id, 
                const struct pios_internal_adc_cfg *cfg, 
                uint16_t number_of_used_pins)
{
        PIOS_DEBUG_Assert(internal_adc_id); PIOS_DEBUG_Assert(cfg);

        // Only ADC1 is supported by this driver
        if(cfg->adc_dev_master != ADC1)
                return -2;

        struct pios_internal_adc_dev * adc_dev;
        adc_dev = PIOS_INTERNAL_ADC_Allocate();
        if(adc_dev == NULL )
                return -1;
        adc_dev->cfg = cfg;
        adc_dev->number_of_used_pins = number_of_used_pins;

        *internal_adc_id = (uint32_t) adc_dev;

        // DMA transfer size in units defined by DMA_PeripheralDataSize, 32bits for dual mode and 16bits for single mode
        adc_dev->dma_transfer_size = adc_dev->number_of_used_pins;
        adc_dev->raw_data_buffer = PIOS_malloc(adc_dev->dma_transfer_size * sizeof(uint16_t));
        if (adc_dev->raw_data_buffer == NULL )
                return -1;

        if(PIOS_INTERNAL_ADC_PinConfig((uint32_t) adc_dev) != 0)
                return -3;

        PIOS_INTERNAL_DMAConfig((uint32_t) adc_dev);

        PIOS_INTERNAL_ADC_Converter_Config((uint32_t) adc_dev);
        return 0;
}

static uint8_t PIOS_INTERNAL_ADC_NumberOfChannels(uintptr_t internal_adc_id)
{
        struct pios_internal_adc_dev * adc_dev = (struct pios_internal_adc_dev *) internal_adc_id;
        if(!PIOS_INTERNAL_ADC_validate(adc_dev))
                return 0;
        return adc_dev->number_of_used_pins;

}

static intptr_t PIOS_INTERNAL_ADC_PinGet(uintptr_t internal_adc_id, uint32_t pin)
{
        struct pios_internal_adc_dev * adc_dev = (struct pios_internal_adc_dev *) internal_adc_id;

        /* Check if pin exists */
        if(pin >= adc_dev->number_of_used_pins) {
                return -1;
        }

        /* This results in a half-word load (2 cycles) of the volatile buffer location
           written by DMA. The buffer is dynamically allocated and thus will always be aligned. 
           A barrier is not required for this on Cortex-M. See ARM App. Note 321 */
        return adc_dev->raw_data_buffer[pin];
}

static float PIOS_INTERNAL_ADC_LSB_Voltage(uintptr_t internal_adc_id)
{
        struct pios_internal_adc_dev * adc_dev = (struct pios_internal_adc_dev *) internal_adc_id;
        if(!PIOS_INTERNAL_ADC_validate(adc_dev)) {
                return 0;
        }
        return VREF_PLUS / (((uint32_t)1 << 12) - 1);
}
#endif /* PIOS_INCLUDE_ADC */