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#define | MAX7456_VM0_VBE_MASK (0b1) |
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#define | MAX7456_VM0_VBE_R(val) (val & MAX7456_VM0_VBE_MASK) |
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#define | MAX7456_VM0_VBE_W(regval, val) ((regval & ~MAX7456_VM0_VBE_MASK) | (val & MAX7456_VM0_VBE_MASK)) |
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#define | MAX7456_VM0_VBE_ENABLE 0b0 |
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#define | MAX7456_VM0_VBE_DISABLE 0b1 |
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#define | MAX7456_VM0_SRB_MASK (0b1 << 1) |
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#define | MAX7456_VM0_SRB_R(val) ((val & MAX7456_VM0_SRB_MASK) >> 1) |
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#define | MAX7456_VM0_SRB_W(regval, val) ((regval & ~MAX7456_VM0_SRB_MASK) | (val << 1 & MAX7456_VM0_SRB_MASK)) |
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#define | MAX7456_VM0_SRB_RESET 0b1 |
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#define | MAX7456_VM0_SRB_CLEAR 0b0 |
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#define | MAX7456_VM0_VS_MASK (0b1 << 2) |
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#define | MAX7456_VM0_VS_R(val) ((val & MAX7456_VM0_VS_MASK) >> 2) |
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#define | MAX7456_VM0_VS_W(regval, val) ((regval & ~MAX7456_VM0_VS_MASK) | (val << 2 & MAX7456_VM0_VS_MASK)) |
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#define | MAX7456_VM0_VS_VSYNC 0b1 |
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#define | MAX7456_VM0_VS_IMMEDIATE 0b0 |
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#define | MAX7456_VM0_OSD_MASK (0b1 << 3) |
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#define | MAX7456_VM0_OSD_R(val) ((val & MAX7456_VM0_OSD_MASK) >> 3) |
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#define | MAX7456_VM0_OSD_W(regval, val) ((regval & ~MAX7456_VM0_OSD_MASK) | (val << 3 & MAX7456_VM0_OSD_MASK)) |
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#define | MAX7456_VM0_OSD_ENABLE 0b1 |
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#define | MAX7456_VM0_OSD_DISABLE 0b0 |
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#define | MAX7456_VM0_SYNC_MASK (0b11 << 4) |
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#define | MAX7456_VM0_SYNC_R(val) ((val & MAX7456_VM0_SYNC_MASK) >> 4) |
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#define | MAX7456_VM0_SYNC_W(regval, val) ((regval & ~MAX7456_VM0_SYNC_MASK) | (val << 4 & MAX7456_VM0_SYNC_MASK)) |
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#define | MAX7456_VM0_SYNC_AUTO 0b00 |
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#define | MAX7456_VM0_SYNC_EXT 0b10 |
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#define | MAX7456_VM0_SYNC_INT 0b11 |
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#define | MAX7456_VM0_VSS_MASK (0b1 << 6) |
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#define | MAX7456_VM0_VSS_R(val) ((val & MAX7456_VM0_VSS_MASK) >> 6) |
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#define | MAX7456_VM0_VSS_W(regval, val) ((regval & ~MAX7456_VM0_VSS_MASK) | (val << 6 & MAX7456_VM0_VSS_MASK)) |
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#define | MAX7456_VM0_VSS_PAL 0b1 |
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#define | MAX7456_VM0_VSS_NTSC 0b0 |
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#define | MAX7456_VM1_BDUTY_MASK (0b11) |
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#define | MAX7456_VM1_BDUTY_R(val) (val & MAX7456_VM1_BDUTY_MASK) |
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#define | MAX7456_VM1_BDUTY_W(regval, val) ((regval & ~MAX7456_VM1_BDUTY_MASK) | (val & MAX7456_VM1_BDUTY_MASK)) |
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#define | MAX7456_VM1_BDUTY_BT 0b00 |
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#define | MAX7456_VM1_BDUTY_2BT 0b01 |
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#define | MAX7456_VM1_BDUTY_3BT 0b10 |
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#define | MAX7456_VM1_BDUTY_13BT 0b11 |
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#define | MAX7456_VM1_BTIME_MASK (0b11 << 2) |
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#define | MAX7456_VM1_BTIME_R(val) ((val & MAX7456_VM1_BTIME_MASK) >> 2) |
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#define | MAX7456_VM1_BTIME_W(regval, val) ((regval & ~MAX7456_VM1_BTIME_MASK) | (val << 2 & MAX7456_VM1_BTIME_MASK)) |
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#define | MAX7456_VM1_BTIME_2FIELD 0b00 |
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#define | MAX7456_VM1_BTIME_4FIELD 0b01 |
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#define | MAX7456_VM1_BTIME_6FIELD 0b10 |
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#define | MAX7456_VM1_BTIME_8FIELD 0b11 |
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#define | MAX7456_VM1_BGLVL_MASK (0b111 << 4) |
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#define | MAX7456_VM1_BGLVL_R(val) ((val & MAX7456_VM1_BGLVL_MASK) >> 4) |
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#define | MAX7456_VM1_BGLVL_W(regval, val) ((regval & ~MAX7456_VM1_BGLVL_MASK) | (val << 4 & MAX7456_VM1_BGLVL_MASK)) |
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#define | MAX7456_VM1_BGLVL_0 0b000 |
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#define | MAX7456_VM1_BGLVL_7 0b001 |
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#define | MAX7456_VM1_BGLVL_14 0b010 |
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#define | MAX7456_VM1_BGLVL_21 0b011 |
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#define | MAX7456_VM1_BGLVL_28 0b100 |
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#define | MAX7456_VM1_BGLVL_35 0b101 |
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#define | MAX7456_VM1_BGLVL_42 0b110 |
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#define | MAX7456_VM1_BGLVL_49 0b111 |
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#define | MAX7456_VM1_BGMODE_MASK (0b1 << 7) |
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#define | MAX7456_VM1_BGMODE_R(val) ((val & MAX7456_VM1_BGMODE_MASK) >> 7) |
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#define | MAX7456_VM1_BGMODE_W(regval, val) ((regval & ~MAX7456_VM1_BGMODE_MASK) | (val << 7 & MAX7456_VM1_BGMODE_MASK)) |
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#define | MAX7456_VM1_BGMODE_LOCAL 0b0 |
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#define | MAX7456_VM1_BGMODE_GRAY 0b1 |
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#define | MAX7456_HOS_POS_MASK (0x3f) |
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#define | MAX7456_HOS_POS_R(val) (val & MAX7456_HOS_POS_MASK) |
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#define | MAX7456_HOS_POS_W(regval, val) (val & MAX7456_HOS_POS_MASK) |
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#define | MAX7456_VOS_POS_MASK (0x3f) |
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#define | MAX7456_VOS_POS_R(val) (val & MAX7456_VOS_POS_MASK) |
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#define | MAX7456_VOS_POS_W(regval, val) (val & MAX7456_VOS_POS_MASK) |
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#define | MAX7456_DMM_CLR_MASK (0b1 << 2) |
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#define | MAX7456_DMM_CLR_R(val) ((val & MAX7456_DMM_CLR_MASK) >> 2) |
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#define | MAX7456_DMM_CLR_W(regval, val) ((regval & ~MAX7456_DMM_CLR_MASK) | (val << 2 & MAX7456_DMM_CLR_MASK)) |
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#define | MAX7456_DMM_CLR_CLEAR 0b1 |
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#define | MAX7456_DMM_CLR_READY 0b0 |
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#define | MAX7456_OSDBL_CTL_MASK (0b1 << 4) |
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#define | MAX7456_OSDBL_CTL_R(val) ((val & MAX7456_OSDBL_CTL_MASK) >> 4) |
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#define | MAX7456_OSDBL_CTL_W(regval, val) ((regval & ~MAX7456_OSDBL_CTL_MASK) | (val << 4 & MAX7456_OSDBL_CTL_MASK)) |
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#define | MAX7456_OSDBL_CTL_ENABLE 0b0 |
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#define | MAX7456_OSDBL_CTL_DISABLE 0b1 |
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#define | MAX7456_STAT_PAL_R(val) (val & 0b1) |
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#define | MAX7456_STAT_PAL_TRUE 0b1 |
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#define | MAX7456_STAT_PAL_FALSE 0b0 |
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#define | MAX7456_STAT_NTSC_R(val) ((val >> 1) & 0b1) |
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#define | MAX7456_STAT_NTSC_TRUE 0b1 |
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#define | MAX7456_STAT_NTSC_FALSE 0b0 |
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#define | MAX7456_STAT_SYNC_R(val) ((val >> 2) & 0b1) |
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#define | MAX7456_STAT_SYNC_FALSE 0b1 |
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#define | MAX7456_STAT_SYNC_TRUE 0b0 |
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#define | MAX7456_STAT_HSYNC_R(val) ((val >> 3) & 0b1) |
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#define | MAX7456_STAT_HSYNC_FALSE 0b1 |
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#define | MAX7456_STAT_HSYNC_TRUE 0b0 |
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#define | MAX7456_STAT_VSYNC_R(val) ((val >> 4) & 0b1) |
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#define | MAX7456_STAT_VSYNC_FALSE 0b1 |
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#define | MAX7456_STAT_VSYNC_TRUE 0b0 |
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#define | MAX7456_STAT_CHMEM_R(val) ((val >> 5) & 0b1) |
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#define | MAX7456_STAT_CHMEM_RDY 0b0 |
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#define | MAX7456_STAT_CHMEM_BUSY 0b1 |
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#define | MAX7456_STAT_RESET_R(val) ((val >> 6) & 0b1) |
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#define | MAX7456_STAT_RESET_DONE 0b0 |
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#define | MAX7456_STAT_RESET_BUSY 0b1 |
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#define | MAX7456_DMDI_AUTOINCREMENT_STOP 0xff |
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#define | MAX7456_CMM_WRITE_NVM 0xa0 |
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#define | MAX7456_CMM_READ_NVM 0x50 |
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- Author
- dRonin, http://dRonin.org/, Copyright (C) 2016
Definition in file pios_max7456_priv.h.