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mcuconf.h
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1 /*
2  ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
3 
4  Licensed under the Apache License, Version 2.0 (the "License");
5  you may not use this file except in compliance with the License.
6  You may obtain a copy of the License at
7 
8  http://www.apache.org/licenses/LICENSE-2.0
9 
10  Unless required by applicable law or agreed to in writing, software
11  distributed under the License is distributed on an "AS IS" BASIS,
12  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13  See the License for the specific language governing permissions and
14  limitations under the License.
15 */
16 
28 /*
29  * STM32F30x drivers configuration.
30  * The following settings override the default settings present in
31  * the various device driver implementation headers.
32  * Note that the settings for each driver only have effect if the whole
33  * driver is enabled in halconf.h.
34  *
35  * IRQ priorities:
36  * 15...0 Lowest...Highest.
37  *
38  * DMA priorities:
39  * 0...3 Lowest...Highest.
40  */
41 
42 #define STM32F30x_MCUCONF
43 
44 /*
45  * HAL driver system settings.
46  */
47 #define STM32_NO_INIT FALSE
48 #define STM32_PVD_ENABLE FALSE
49 #define STM32_PLS STM32_PLS_LEV0
50 #define STM32_HSI_ENABLED TRUE
51 #define STM32_LSI_ENABLED TRUE
52 #define STM32_HSE_ENABLED TRUE
53 #define STM32_LSE_ENABLED FALSE
54 #define STM32_SW STM32_SW_PLL
55 #define STM32_PLLSRC STM32_PLLSRC_HSE
56 #define STM32_PREDIV_VALUE 1
57 #define STM32_PLLMUL_VALUE 9
58 #define STM32_HPRE STM32_HPRE_DIV1
59 #define STM32_PPRE1 STM32_PPRE1_DIV2
60 #define STM32_PPRE2 STM32_PPRE2_DIV2
61 #define STM32_MCOSEL STM32_MCOSEL_NOCLOCK
62 #define STM32_ADC12PRES STM32_ADC12PRES_DIV1
63 #define STM32_ADC34PRES STM32_ADC34PRES_DIV1
64 #define STM32_USART1SW STM32_USART1SW_PCLK
65 #define STM32_USART2SW STM32_USART2SW_PCLK
66 #define STM32_USART3SW STM32_USART3SW_PCLK
67 #define STM32_UART4SW STM32_UART4SW_PCLK
68 #define STM32_UART5SW STM32_UART5SW_PCLK
69 #define STM32_I2C1SW STM32_I2C1SW_HSI
70 #define STM32_I2C2SW STM32_I2C2SW_HSI
71 #define STM32_TIM1SW STM32_TIM1SW_PCLK2
72 #define STM32_TIM8SW STM32_TIM8SW_PCLK2
73 #define STM32_RTCSEL STM32_RTCSEL_LSI
74 #define STM32_USB_CLOCK_REQUIRED TRUE
75 #define STM32_USBPRE STM32_USBPRE_DIV1P5
76 
77 /*
78  * ADC driver system settings.
79  */
80 #define STM32_ADC_USE_ADC1 FALSE
81 #define STM32_ADC_USE_ADC3 FALSE
82 #define STM32_ADC_ADC12_DMA_PRIORITY 2
83 #define STM32_ADC_ADC34_DMA_PRIORITY 2
84 #define STM32_ADC_ADC12_IRQ_PRIORITY 5
85 #define STM32_ADC_ADC34_IRQ_PRIORITY 5
86 #define STM32_ADC_ADC12_DMA_IRQ_PRIORITY 5
87 #define STM32_ADC_ADC34_DMA_IRQ_PRIORITY 5
88 #define STM32_ADC_ADC12_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1
89 #define STM32_ADC_ADC34_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1
90 #define STM32_ADC_DUAL_MODE FALSE
91 
92 /*
93  * CAN driver system settings.
94  */
95 #define STM32_CAN_USE_CAN1 FALSE
96 #define STM32_CAN_CAN1_IRQ_PRIORITY 11
97 
98 /*
99  * EXT driver system settings.
100  */
101 #define STM32_EXT_EXTI0_IRQ_PRIORITY 6
102 #define STM32_EXT_EXTI1_IRQ_PRIORITY 6
103 #define STM32_EXT_EXTI2_IRQ_PRIORITY 6
104 #define STM32_EXT_EXTI3_IRQ_PRIORITY 6
105 #define STM32_EXT_EXTI4_IRQ_PRIORITY 6
106 #define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6
107 #define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6
108 #define STM32_EXT_EXTI16_IRQ_PRIORITY 6
109 #define STM32_EXT_EXTI17_IRQ_PRIORITY 6
110 #define STM32_EXT_EXTI18_IRQ_PRIORITY 6
111 #define STM32_EXT_EXTI19_IRQ_PRIORITY 6
112 #define STM32_EXT_EXTI20_IRQ_PRIORITY 6
113 #define STM32_EXT_EXTI21_22_29_IRQ_PRIORITY 6
114 #define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6
115 #define STM32_EXT_EXTI33_IRQ_PRIORITY 6
116 
117 /*
118  * GPT driver system settings.
119  */
120 #define STM32_GPT_USE_TIM1 FALSE
121 #define STM32_GPT_USE_TIM2 FALSE
122 #define STM32_GPT_USE_TIM3 FALSE
123 #define STM32_GPT_USE_TIM4 FALSE
124 #define STM32_GPT_USE_TIM6 FALSE
125 #define STM32_GPT_USE_TIM7 FALSE
126 #define STM32_GPT_USE_TIM8 FALSE
127 #define STM32_GPT_TIM1_IRQ_PRIORITY 7
128 #define STM32_GPT_TIM2_IRQ_PRIORITY 7
129 #define STM32_GPT_TIM3_IRQ_PRIORITY 7
130 #define STM32_GPT_TIM4_IRQ_PRIORITY 7
131 #define STM32_GPT_TIM6_IRQ_PRIORITY 7
132 #define STM32_GPT_TIM7_IRQ_PRIORITY 7
133 #define STM32_GPT_TIM8_IRQ_PRIORITY 7
134 
135 /*
136  * I2C driver system settings.
137  */
138 #define STM32_I2C_USE_I2C1 FALSE
139 #define STM32_I2C_USE_I2C2 FALSE
140 #define STM32_I2C_I2C1_IRQ_PRIORITY 10
141 #define STM32_I2C_I2C2_IRQ_PRIORITY 10
142 #define STM32_I2C_I2C1_DMA_PRIORITY 1
143 #define STM32_I2C_I2C2_DMA_PRIORITY 1
144 #define STM32_I2C_DMA_ERROR_HOOK(i2cp) chSysHalt()
145 
146 /*
147  * ICU driver system settings.
148  */
149 #define STM32_ICU_USE_TIM1 FALSE
150 #define STM32_ICU_USE_TIM2 FALSE
151 #define STM32_ICU_USE_TIM3 FALSE
152 #define STM32_ICU_USE_TIM4 FALSE
153 #define STM32_ICU_USE_TIM8 FALSE
154 #define STM32_ICU_TIM1_IRQ_PRIORITY 7
155 #define STM32_ICU_TIM2_IRQ_PRIORITY 7
156 #define STM32_ICU_TIM3_IRQ_PRIORITY 7
157 #define STM32_ICU_TIM4_IRQ_PRIORITY 7
158 #define STM32_ICU_TIM8_IRQ_PRIORITY 7
159 
160 /*
161  * PWM driver system settings.
162  */
163 #define STM32_PWM_USE_ADVANCED FALSE
164 #define STM32_PWM_USE_TIM1 FALSE
165 #define STM32_PWM_USE_TIM2 FALSE
166 #define STM32_PWM_USE_TIM3 FALSE
167 #define STM32_PWM_USE_TIM4 FALSE
168 #define STM32_PWM_USE_TIM8 FALSE
169 #define STM32_PWM_TIM1_IRQ_PRIORITY 7
170 #define STM32_PWM_TIM2_IRQ_PRIORITY 7
171 #define STM32_PWM_TIM3_IRQ_PRIORITY 7
172 #define STM32_PWM_TIM4_IRQ_PRIORITY 7
173 #define STM32_PWM_TIM8_IRQ_PRIORITY 7
174 
175 /*
176  * SERIAL driver system settings.
177  */
178 #define STM32_SERIAL_USE_USART1 FALSE
179 #define STM32_SERIAL_USE_USART2 FALSE
180 #define STM32_SERIAL_USE_USART3 FALSE
181 #define STM32_SERIAL_USE_UART4 FALSE
182 #define STM32_SERIAL_USE_UART5 FALSE
183 #define STM32_SERIAL_USART1_PRIORITY 12
184 #define STM32_SERIAL_USART2_PRIORITY 12
185 #define STM32_SERIAL_USART3_PRIORITY 12
186 #define STM32_SERIAL_UART4_PRIORITY 12
187 #define STM32_SERIAL_UART5_PRIORITY 12
188 
189 /*
190  * SPI driver system settings.
191  */
192 #define STM32_SPI_USE_SPI1 FALSE
193 #define STM32_SPI_USE_SPI2 FALSE
194 #define STM32_SPI_USE_SPI3 FALSE
195 #define STM32_SPI_SPI1_DMA_PRIORITY 1
196 #define STM32_SPI_SPI2_DMA_PRIORITY 1
197 #define STM32_SPI_SPI3_DMA_PRIORITY 1
198 #define STM32_SPI_SPI1_IRQ_PRIORITY 10
199 #define STM32_SPI_SPI2_IRQ_PRIORITY 10
200 #define STM32_SPI_SPI3_IRQ_PRIORITY 10
201 #define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt()
202 
203 /*
204  * UART driver system settings.
205  */
206 #define STM32_UART_USE_USART1 FALSE
207 #define STM32_UART_USE_USART2 FALSE
208 #define STM32_UART_USE_USART3 FALSE
209 #define STM32_UART_USART1_IRQ_PRIORITY 12
210 #define STM32_UART_USART2_IRQ_PRIORITY 12
211 #define STM32_UART_USART3_IRQ_PRIORITY 12
212 #define STM32_UART_USART1_DMA_PRIORITY 0
213 #define STM32_UART_USART2_DMA_PRIORITY 0
214 #define STM32_UART_USART3_DMA_PRIORITY 0
215 #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt()
216 
217 /*
218  * USB driver system settings.
219  */
220 #define STM32_USB_USE_USB1 FALSE
221 #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE
222 #define STM32_USB_USB1_HP_IRQ_PRIORITY 13
223 #define STM32_USB_USB1_LP_IRQ_PRIORITY 14
224