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adbada4
dRonin firmware
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pios_mpu_priv.h
Go to the documentation of this file.
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/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, see <http://www.gnu.org/licenses/>
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*/
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#ifndef PIOS_MPU_PRIV_H
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#define PIOS_MPU_PRIV_H
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#include "
pios_mpu.h
"
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/* MPU60X0 Addresses */
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#define PIOS_MPU_PRODUCT_ID 0x0C
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#define PIOS_MPU_SMPLRT_DIV_REG 0X19
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#define PIOS_MPU_DLPF_CFG_REG 0X1A
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#define PIOS_MPU_GYRO_CFG_REG 0X1B
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#define PIOS_MPU_ACCEL_CFG_REG 0X1C
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#define PIOS_MPU_ACCEL_CFG2_REG 0X1D
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#define PIOS_MPU_FIFO_EN_REG 0x23
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#define PIOS_MPU_SLV0_ADDR_REG 0x25
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#define PIOS_MPU_SLV0_REG_REG 0x26
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#define PIOS_MPU_SLV0_CTRL_REG 0x27
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#define PIOS_MPU_SLV1_ADDR_REG 0x28
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#define PIOS_MPU_SLV1_REG_REG 0x29
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#define PIOS_MPU_SLV1_DO_REG 0x64
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#define PIOS_MPU_SLV1_CTRL_REG 0x2A
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#define PIOS_MPU_SLV4_ADDR_REG 0x31
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#define PIOS_MPU_SLV4_REG_REG 0x32
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#define PIOS_MPU_SLV4_DO_REG 0x33
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#define PIOS_MPU_SLV4_CTRL_REG 0x34
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#define PIOS_MPU_SLV4_DI_REG 0x35
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#define PIOS_MPU_I2C_MST_STATUS_REG 0x36
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#define PIOS_MPU_INT_CFG_REG 0x37
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#define PIOS_MPU_INT_EN_REG 0x38
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#define PIOS_MPU_INT_STATUS_REG 0x3A
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#define PIOS_MPU_ACCEL_X_OUT_MSB 0x3B
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#define PIOS_MPU_ACCEL_X_OUT_LSB 0x3C
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#define PIOS_MPU_ACCEL_Y_OUT_MSB 0x3D
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#define PIOS_MPU_ACCEL_Y_OUT_LSB 0x3E
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#define PIOS_MPU_ACCEL_Z_OUT_MSB 0x3F
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#define PIOS_MPU_ACCEL_Z_OUT_LSB 0x40
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#define PIOS_MPU_TEMP_OUT_MSB 0x41
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#define PIOS_MPU_TEMP_OUT_LSB 0x42
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#define PIOS_MPU_GYRO_X_OUT_MSB 0x43
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#define PIOS_MPU_GYRO_X_OUT_LSB 0x44
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#define PIOS_MPU_GYRO_Y_OUT_MSB 0x45
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#define PIOS_MPU_GYRO_Y_OUT_LSB 0x46
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#define PIOS_MPU_GYRO_Z_OUT_MSB 0x47
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#define PIOS_MPU_GYRO_Z_OUT_LSB 0x48
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#define PIOS_MPU_I2C_MST_DELAY_CTRL 0x67
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#define PIOS_MPU_SIGNAL_PATH_RESET 0x68
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#define PIOS_MPU_USER_CTRL_REG 0x6A
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#define PIOS_MPU_PWR_MGMT_REG 0x6B
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#define PIOS_MPU_FIFO_CNT_MSB 0x72
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#define PIOS_MPU_FIFO_CNT_LSB 0x73
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#define PIOS_MPU_FIFO_REG 0x74
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#define PIOS_MPU_WHOAMI 0x75
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/* FIFO enable for storing different values */
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#define PIOS_MPU_FIFO_TEMP_OUT 0x80
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#define PIOS_MPU_FIFO_GYRO_X_OUT 0x40
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#define PIOS_MPU_FIFO_GYRO_Y_OUT 0x20
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#define PIOS_MPU_FIFO_GYRO_Z_OUT 0x10
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#define PIOS_MPU_ACCEL_OUT 0x08
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/* Interrupt Configuration */
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#define PIOS_MPU_INT_ACTL 0x80
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#define PIOS_MPU_INT_OPEN 0x40
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#define PIOS_MPU_INT_LATCH_EN 0x20
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#define PIOS_MPU_INT_CLR_ANYRD 0x10
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#define PIOS_MPU_INT_I2C_BYPASS_EN 0x02
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#define PIOS_MPU_INTEN_OVERFLOW 0x10
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#define PIOS_MPU_INTEN_DATA_RDY 0x01
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/* Interrupt status */
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#define PIOS_MPU_INT_STATUS_OVERFLOW 0x10
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#define PIOS_MPU_INT_STATUS_IMU_RDY 0X04
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#define PIOS_MPU_INT_STATUS_DATA_RDY 0X01
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/* User control functionality */
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#define PIOS_MPU_USERCTL_FIFO_EN 0X40
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#define PIOS_MPU_USERCTL_I2C_MST_EN 0X20
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#define PIOS_MPU_USERCTL_DIS_I2C 0X10
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#define PIOS_MPU_USERCTL_FIFO_RST 0X02
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#define PIOS_MPU_USERCTL_GYRO_RST 0X01
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/* Power management and clock selection */
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#define PIOS_MPU_PWRMGMT_IMU_RST 0X80
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#define PIOS_MPU_PWRMGMT_INTERN_CLK 0X00
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#define PIOS_MPU_PWRMGMT_PLL_X_CLK 0X01
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#define PIOS_MPU_PWRMGMT_PLL_Y_CLK 0X02
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#define PIOS_MPU_PWRMGMT_PLL_Z_CLK 0X03
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#define PIOS_MPU_PWRMGMT_STOP_CLK 0X07
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/* I2C master status register bits */
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#define PIOS_MPU_I2C_MST_SLV4_DONE 0x40
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#define PIOS_MPU_I2C_MST_LOST_ARB 0x20
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#define PIOS_MPU_I2C_MST_SLV4_NACK 0x10
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#define PIOS_MPU_I2C_MST_SLV0_NACK 0x01
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/* I2C SLV register bits */
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#define PIOS_MPU_I2CSLV_EN 0x80
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#define PIOS_MPU_I2CSLV_BYTE_SW 0x40
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#define PIOS_MPU_I2CSLV_REG_DIS 0x20
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#define PIOS_MPU_I2CSLV_GRP 0x10
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/* I2C MST Delay Control register btis */
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#define PIOS_MPU_I2CMSTDELAY_SLV0EN 0x01
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#define PIOS_MPU_I2CMSTDELAY_SLV1EN 0x02
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#define PIOS_MPU_I2CMSTDELAY_ESSHADOW 0x80
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/* AK89XX Registers */
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#define PIOS_MPU_AK89XX_ADDR 0x0C
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#define PIOS_MPU_AK89XX_WHOAMI_REG 0x00
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#define PIOS_MPU_AK89XX_WHOAMI_ID 0x48
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#define PIOS_MPU_AK89XX_ST1_REG 0x02
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#define PIOS_MPU_AK89XX_ST2_REG 0x09
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#define PIOS_MPU_AK89XX_ST1_DRDY 0x01
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#define PIOS_MPU_AK8963_ST2_BITM 0x10
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#define PIOS_MPU_AK89XX_ST2_HOFL 0x08
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#define PIOS_MPU_AK8975_ST2_DERR 0x04
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#define PIOS_MPU_AK89XX_CNTL1_REG 0x0A
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#define PIOS_MPU_AK8963_CNTL2_REG 0x0B
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#define PIOS_MPU_AK8963_CNTL2_SRST 0x01
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#define PIOS_MPU_AK8963_MODE_CONTINUOUS_FAST_16B 0x16
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#define PIOS_MPU_AK8975_MODE_SINGLE_12B 0x01
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#endif
/* PIOS_MPU_PRIV_H */
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pios_mpu.h
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pios_mpu_priv.h
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