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pios_mpu_priv.h
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1 
14 /*
15  * This program is free software; you can redistribute it and/or modify
16  * it under the terms of the GNU General Public License as published by
17  * the Free Software Foundation; either version 3 of the License, or
18  * (at your option) any later version.
19  *
20  * This program is distributed in the hope that it will be useful, but
21  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
22  * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
23  * for more details.
24  *
25  * You should have received a copy of the GNU General Public License along
26  * with this program; if not, see <http://www.gnu.org/licenses/>
27  */
28 
29 #ifndef PIOS_MPU_PRIV_H
30 #define PIOS_MPU_PRIV_H
31 
32 #include "pios_mpu.h"
33 
34 /* MPU60X0 Addresses */
35 #define PIOS_MPU_PRODUCT_ID 0x0C
36 #define PIOS_MPU_SMPLRT_DIV_REG 0X19
37 #define PIOS_MPU_DLPF_CFG_REG 0X1A
38 #define PIOS_MPU_GYRO_CFG_REG 0X1B
39 #define PIOS_MPU_ACCEL_CFG_REG 0X1C
40 #define PIOS_MPU_ACCEL_CFG2_REG 0X1D
41 #define PIOS_MPU_FIFO_EN_REG 0x23
42 #define PIOS_MPU_SLV0_ADDR_REG 0x25
43 #define PIOS_MPU_SLV0_REG_REG 0x26
44 #define PIOS_MPU_SLV0_CTRL_REG 0x27
45 #define PIOS_MPU_SLV1_ADDR_REG 0x28
46 #define PIOS_MPU_SLV1_REG_REG 0x29
47 #define PIOS_MPU_SLV1_DO_REG 0x64
48 #define PIOS_MPU_SLV1_CTRL_REG 0x2A
49 #define PIOS_MPU_SLV4_ADDR_REG 0x31
50 #define PIOS_MPU_SLV4_REG_REG 0x32
51 #define PIOS_MPU_SLV4_DO_REG 0x33
52 #define PIOS_MPU_SLV4_CTRL_REG 0x34
53 #define PIOS_MPU_SLV4_DI_REG 0x35
54 #define PIOS_MPU_I2C_MST_STATUS_REG 0x36
55 #define PIOS_MPU_INT_CFG_REG 0x37
56 #define PIOS_MPU_INT_EN_REG 0x38
57 #define PIOS_MPU_INT_STATUS_REG 0x3A
58 #define PIOS_MPU_ACCEL_X_OUT_MSB 0x3B
59 #define PIOS_MPU_ACCEL_X_OUT_LSB 0x3C
60 #define PIOS_MPU_ACCEL_Y_OUT_MSB 0x3D
61 #define PIOS_MPU_ACCEL_Y_OUT_LSB 0x3E
62 #define PIOS_MPU_ACCEL_Z_OUT_MSB 0x3F
63 #define PIOS_MPU_ACCEL_Z_OUT_LSB 0x40
64 #define PIOS_MPU_TEMP_OUT_MSB 0x41
65 #define PIOS_MPU_TEMP_OUT_LSB 0x42
66 #define PIOS_MPU_GYRO_X_OUT_MSB 0x43
67 #define PIOS_MPU_GYRO_X_OUT_LSB 0x44
68 #define PIOS_MPU_GYRO_Y_OUT_MSB 0x45
69 #define PIOS_MPU_GYRO_Y_OUT_LSB 0x46
70 #define PIOS_MPU_GYRO_Z_OUT_MSB 0x47
71 #define PIOS_MPU_GYRO_Z_OUT_LSB 0x48
72 #define PIOS_MPU_I2C_MST_DELAY_CTRL 0x67
73 #define PIOS_MPU_SIGNAL_PATH_RESET 0x68
74 #define PIOS_MPU_USER_CTRL_REG 0x6A
75 #define PIOS_MPU_PWR_MGMT_REG 0x6B
76 #define PIOS_MPU_FIFO_CNT_MSB 0x72
77 #define PIOS_MPU_FIFO_CNT_LSB 0x73
78 #define PIOS_MPU_FIFO_REG 0x74
79 #define PIOS_MPU_WHOAMI 0x75
80 
81 /* FIFO enable for storing different values */
82 #define PIOS_MPU_FIFO_TEMP_OUT 0x80
83 #define PIOS_MPU_FIFO_GYRO_X_OUT 0x40
84 #define PIOS_MPU_FIFO_GYRO_Y_OUT 0x20
85 #define PIOS_MPU_FIFO_GYRO_Z_OUT 0x10
86 #define PIOS_MPU_ACCEL_OUT 0x08
87 
88 /* Interrupt Configuration */
89 #define PIOS_MPU_INT_ACTL 0x80
90 #define PIOS_MPU_INT_OPEN 0x40
91 #define PIOS_MPU_INT_LATCH_EN 0x20
92 #define PIOS_MPU_INT_CLR_ANYRD 0x10
93 #define PIOS_MPU_INT_I2C_BYPASS_EN 0x02
94 
95 #define PIOS_MPU_INTEN_OVERFLOW 0x10
96 #define PIOS_MPU_INTEN_DATA_RDY 0x01
97 
98 /* Interrupt status */
99 #define PIOS_MPU_INT_STATUS_OVERFLOW 0x10
100 #define PIOS_MPU_INT_STATUS_IMU_RDY 0X04
101 #define PIOS_MPU_INT_STATUS_DATA_RDY 0X01
102 
103 /* User control functionality */
104 #define PIOS_MPU_USERCTL_FIFO_EN 0X40
105 #define PIOS_MPU_USERCTL_I2C_MST_EN 0X20
106 #define PIOS_MPU_USERCTL_DIS_I2C 0X10
107 #define PIOS_MPU_USERCTL_FIFO_RST 0X02
108 #define PIOS_MPU_USERCTL_GYRO_RST 0X01
109 
110 /* Power management and clock selection */
111 #define PIOS_MPU_PWRMGMT_IMU_RST 0X80
112 #define PIOS_MPU_PWRMGMT_INTERN_CLK 0X00
113 #define PIOS_MPU_PWRMGMT_PLL_X_CLK 0X01
114 #define PIOS_MPU_PWRMGMT_PLL_Y_CLK 0X02
115 #define PIOS_MPU_PWRMGMT_PLL_Z_CLK 0X03
116 #define PIOS_MPU_PWRMGMT_STOP_CLK 0X07
117 
118 /* I2C master status register bits */
119 #define PIOS_MPU_I2C_MST_SLV4_DONE 0x40
120 #define PIOS_MPU_I2C_MST_LOST_ARB 0x20
121 #define PIOS_MPU_I2C_MST_SLV4_NACK 0x10
122 #define PIOS_MPU_I2C_MST_SLV0_NACK 0x01
123 
124 /* I2C SLV register bits */
125 #define PIOS_MPU_I2CSLV_EN 0x80
126 #define PIOS_MPU_I2CSLV_BYTE_SW 0x40
127 #define PIOS_MPU_I2CSLV_REG_DIS 0x20
128 #define PIOS_MPU_I2CSLV_GRP 0x10
129 
130 /* I2C MST Delay Control register btis */
131 #define PIOS_MPU_I2CMSTDELAY_SLV0EN 0x01
132 #define PIOS_MPU_I2CMSTDELAY_SLV1EN 0x02
133 #define PIOS_MPU_I2CMSTDELAY_ESSHADOW 0x80
134 
135 /* AK89XX Registers */
136 #define PIOS_MPU_AK89XX_ADDR 0x0C
137 #define PIOS_MPU_AK89XX_WHOAMI_REG 0x00
138 #define PIOS_MPU_AK89XX_WHOAMI_ID 0x48
139 #define PIOS_MPU_AK89XX_ST1_REG 0x02
140 #define PIOS_MPU_AK89XX_ST2_REG 0x09
141 #define PIOS_MPU_AK89XX_ST1_DRDY 0x01
142 #define PIOS_MPU_AK8963_ST2_BITM 0x10
143 #define PIOS_MPU_AK89XX_ST2_HOFL 0x08
144 #define PIOS_MPU_AK8975_ST2_DERR 0x04
145 #define PIOS_MPU_AK89XX_CNTL1_REG 0x0A
146 #define PIOS_MPU_AK8963_CNTL2_REG 0x0B
147 #define PIOS_MPU_AK8963_CNTL2_SRST 0x01
148 #define PIOS_MPU_AK8963_MODE_CONTINUOUS_FAST_16B 0x16
149 #define PIOS_MPU_AK8975_MODE_SINGLE_12B 0x01
150 
151 #endif /* PIOS_MPU_PRIV_H */
152