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usb_conf.h
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1 
33 /* Define to prevent recursive inclusion -------------------------------------*/
34 #ifndef __USB_CONF__H__
35 #define __USB_CONF__H__
36 
37 /* Includes ------------------------------------------------------------------*/
38 #include "stm32f4xx.h"
39 
40 
54 /* USB Core and PHY interface configuration.
55  Tip: To avoid modifying these defines each time you need to change the USB
56  configuration, you can declare the needed define in your toolchain
57  compiler preprocessor.
58  */
59 /****************** USB OTG FS PHY CONFIGURATION *******************************
60 * The USB OTG FS Core supports one on-chip Full Speed PHY.
61 *
62 * The USE_EMBEDDED_PHY symbol is defined in the project compiler preprocessor
63 * when FS core is used.
64 *******************************************************************************/
65 #ifndef USE_USB_OTG_FS
66  #define USE_USB_OTG_FS
67 #endif /* USE_USB_OTG_FS */
68 
69 #ifdef USE_USB_OTG_FS
70  #define USB_OTG_FS_CORE
71 #endif
72 
73 /****************** USB OTG HS PHY CONFIGURATION *******************************
74 * The USB OTG HS Core supports two PHY interfaces:
75 * (i) An ULPI interface for the external High Speed PHY: the USB HS Core will
76 * operate in High speed mode
77 * (ii) An on-chip Full Speed PHY: the USB HS Core will operate in Full speed mode
78 *
79 * You can select the PHY to be used using one of these two defines:
80 * (i) USE_ULPI_PHY: if the USB OTG HS Core is to be used in High speed mode
81 * (ii) USE_EMBEDDED_PHY: if the USB OTG HS Core is to be used in Full speed mode
82 *
83 * Notes:
84 * - The USE_ULPI_PHY symbol is defined in the project compiler preprocessor as
85 * default PHY when HS core is used.
86 * - On STM322xG-EVAL and STM324xG-EVAL boards, only configuration(i) is available.
87 * Configuration (ii) need a different hardware, for more details refer to your
88 * STM32 device datasheet.
89 *******************************************************************************/
90 #ifndef USE_USB_OTG_HS
91  //#define USE_USB_OTG_HS
92 #endif /* USE_USB_OTG_HS */
93 
94 #ifndef USE_ULPI_PHY
95  //#define USE_ULPI_PHY
96 #endif /* USE_ULPI_PHY */
97 
98 #ifndef USE_EMBEDDED_PHY
99  #define USE_EMBEDDED_PHY
100 #endif /* USE_EMBEDDED_PHY */
101 
102 #ifdef USE_USB_OTG_FS
103  #define USB_OTG_FS_CORE
104 #endif
105 
106 #ifdef USE_USB_OTG_HS
107  #define USB_OTG_HS_CORE
108 #endif
109 
110 /*******************************************************************************
111 * FIFO Size Configuration in Device mode
112 *
113 * (i) Receive data FIFO size = RAM for setup packets +
114 * OUT endpoint control information +
115 * data OUT packets + miscellaneous
116 * Space = ONE 32-bits words
117 * --> RAM for setup packets = 10 spaces
118 * (n is the nbr of CTRL EPs the device core supports)
119 * --> OUT EP CTRL info = 1 space
120 * (one space for status information written to the FIFO along with each
121 * received packet)
122 * --> data OUT packets = (Largest Packet Size / 4) + 1 spaces
123 * (MINIMUM to receive packets)
124 * --> OR data OUT packets = at least 2*(Largest Packet Size / 4) + 1 spaces
125 * (if high-bandwidth EP is enabled or multiple isochronous EPs)
126 * --> miscellaneous = 1 space per OUT EP
127 * (one space for transfer complete status information also pushed to the
128 * FIFO with each endpoint's last packet)
129 *
130 * (ii)MINIMUM RAM space required for each IN EP Tx FIFO = MAX packet size for
131 * that particular IN EP. More space allocated in the IN EP Tx FIFO results
132 * in a better performance on the USB and can hide latencies on the AHB.
133 *
134 * (iii) TXn min size = 16 words. (n : Transmit FIFO index)
135 * (iv) When a TxFIFO is not used, the Configuration should be as follows:
136 * case 1 : n > m and Txn is not used (n,m : Transmit FIFO indexes)
137 * --> Txm can use the space allocated for Txn.
138 * case2 : n < m and Txn is not used (n,m : Transmit FIFO indexes)
139 * --> Txn should be configured with the minimum space of 16 words
140 * (v) The FIFO is used optimally when used TxFIFOs are allocated in the top
141 * of the FIFO.Ex: use EP1 and EP2 as IN instead of EP1 and EP3 as IN ones.
142 *******************************************************************************/
143 
144 /*******************************************************************************
145 * FIFO Size Configuration in Host mode
146 *
147 * (i) Receive data FIFO size = (Largest Packet Size / 4) + 1 or
148 * 2x (Largest Packet Size / 4) + 1, If a
149 * high-bandwidth channel or multiple isochronous
150 * channels are enabled
151 *
152 * (ii) For the host nonperiodic Transmit FIFO is the largest maximum packet size
153 * for all supported nonperiodic OUT channels. Typically, a space
154 * corresponding to two Largest Packet Size is recommended.
155 *
156 * (iii) The minimum amount of RAM required for Host periodic Transmit FIFO is
157 * the largest maximum packet size for all supported periodic OUT channels.
158 * If there is at least one High Bandwidth Isochronous OUT endpoint,
159 * then the space must be at least two times the maximum packet size for
160 * that channel.
161 *******************************************************************************/
162 
163 /****************** USB OTG HS CONFIGURATION **********************************/
164 #ifdef USB_OTG_HS_CORE
165  #define RX_FIFO_HS_SIZE 512
166  #define TX0_FIFO_HS_SIZE 512
167  #define TX1_FIFO_HS_SIZE 512
168  #define TX2_FIFO_HS_SIZE 0
169  #define TX3_FIFO_HS_SIZE 0
170  #define TX4_FIFO_HS_SIZE 0
171  #define TX5_FIFO_HS_SIZE 0
172  #define TXH_NP_HS_FIFOSIZ 96
173  #define TXH_P_HS_FIFOSIZ 96
174 
175 // #define USB_OTG_HS_LOW_PWR_MGMT_SUPPORT
176 // #define USB_OTG_HS_SOF_OUTPUT_ENABLED
177 
178 // #define USB_OTG_INTERNAL_VBUS_ENABLED
179  #define USB_OTG_EXTERNAL_VBUS_ENABLED
180 
181  #ifdef USE_ULPI_PHY
182  #define USB_OTG_ULPI_PHY_ENABLED
183  #endif
184  #ifdef USE_EMBEDDED_PHY
185  #define USB_OTG_EMBEDDED_PHY_ENABLED
186  #endif
187  #define USB_OTG_HS_INTERNAL_DMA_ENABLED
188  #define USB_OTG_HS_DEDICATED_EP1_ENABLED
189 #endif
190 
191 /****************** USB OTG FS CONFIGURATION **********************************/
192 #ifdef USB_OTG_FS_CORE
193  #define RX_FIFO_FS_SIZE 128
194  #define TX0_FIFO_FS_SIZE 64
195  #define TX1_FIFO_FS_SIZE 32
196  #define TX2_FIFO_FS_SIZE 32
197  #define TX3_FIFO_FS_SIZE 64
198  #define TXH_NP_HS_FIFOSIZ 96
199  #define TXH_P_HS_FIFOSIZ 96
200 
201 // #define USB_OTG_FS_LOW_PWR_MGMT_SUPPORT
202 // #define USB_OTG_FS_SOF_OUTPUT_ENABLED
203 #endif
204 
205 /****************** USB OTG MISC CONFIGURATION ********************************/
206 //#define VBUS_SENSING_ENABLED
207 
208 /****************** USB OTG MODE CONFIGURATION ********************************/
209 //#define USE_HOST_MODE
210 #define USE_DEVICE_MODE
211 //#define USE_OTG_MODE
212 
213 #ifndef USB_OTG_FS_CORE
214  #ifndef USB_OTG_HS_CORE
215  #error "USB_OTG_HS_CORE or USB_OTG_FS_CORE should be defined"
216  #endif
217 #endif
218 
219 #ifndef USE_DEVICE_MODE
220  #ifndef USE_HOST_MODE
221  #error "USE_DEVICE_MODE or USE_HOST_MODE should be defined"
222  #endif
223 #endif
224 
225 #ifndef USE_USB_OTG_HS
226  #ifndef USE_USB_OTG_FS
227  #error "USE_USB_OTG_HS or USE_USB_OTG_FS should be defined"
228  #endif
229 #else //USE_USB_OTG_HS
230  #ifndef USE_ULPI_PHY
231  #ifndef USE_EMBEDDED_PHY
232  #error "USE_ULPI_PHY or USE_EMBEDDED_PHY should be defined"
233  #endif
234  #endif
235 #endif
236 
237 /****************** C Compilers dependant keywords ****************************/
238 /* In HS mode and when the DMA is used, all variables and data structures dealing
239  with the DMA during the transaction process should be 4-bytes aligned */
240 #ifdef USB_OTG_HS_INTERNAL_DMA_ENABLED
241  #if defined (__GNUC__) /* GNU Compiler */
242  #define __ALIGN_END __attribute__ ((aligned (4)))
243  #define __ALIGN_BEGIN
244  #else
245  #define __ALIGN_END
246  #if defined (__CC_ARM) /* ARM Compiler */
247  #define __ALIGN_BEGIN __align(4)
248  #elif defined (__ICCARM__) /* IAR Compiler */
249  #define __ALIGN_BEGIN
250  #elif defined (__TASKING__) /* TASKING Compiler */
251  #define __ALIGN_BEGIN __align(4)
252  #endif /* __CC_ARM */
253  #endif /* __GNUC__ */
254 #else
255  #define __ALIGN_BEGIN
256  #define __ALIGN_END
257 #endif /* USB_OTG_HS_INTERNAL_DMA_ENABLED */
258 
259 /* __packed keyword used to decrease the data type alignment to 1-byte */
260 #if !defined(__packed)
261 
262 #if defined (__CC_ARM) /* ARM Compiler */
263  #define __packed __packed
264 #elif defined (__ICCARM__) /* IAR Compiler */
265  #define __packed __packed
266 #elif defined ( __GNUC__ ) /* GNU Compiler */
267  #define __packed __attribute__ ((__packed__))
268 #elif defined (__TASKING__) /* TASKING Compiler */
269  #define __packed __unaligned
270 #endif /* __CC_ARM */
271 
272 #endif /* __packed **/
273 
309 #endif //__USB_CONF__H__
310 
311 
325 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
326