dRonin
adbada4
dRonin firmware
Main Page
Related Pages
Modules
Namespaces
Data Structures
Files
File List
Globals
All
Data Structures
Namespaces
Files
Functions
Variables
Typedefs
Enumerations
Enumerator
Macros
Groups
Pages
pios_chibios_transition_priv.h
Go to the documentation of this file.
1
7
/*
8
* This program is free software; you can redistribute it and/or modify
9
* it under the terms of the GNU General Public License as published by
10
* the Free Software Foundation; either version 3 of the License, or
11
* (at your option) any later version.
12
*
13
* This program is distributed in the hope that it will be useful, but
14
* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15
* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16
* for more details.
17
*
18
* You should have received a copy of the GNU General Public License along
19
* with this program; if not, see <http://www.gnu.org/licenses/>
20
*/
21
22
#ifndef PIOS_CHIBIOS_TRANSITION_PRIV_H_
23
#define PIOS_CHIBIOS_TRANSITION_PRIV_H_
24
25
#define WWDG_IRQHandler Vector40 // Window WatchDog
26
#define PVD_IRQHandler Vector44 // PVD through EXTI Line detection
27
#define TAMP_STAMP_IRQHandler Vector48 // Tamper and TimeStamps through the EXTI line
28
#define RTC_WKUP_IRQHandler Vector4C // RTC Wakeup through the EXTI line
29
#define FLASH_IRQHandler Vector50 // FLASH
30
#define RCC_IRQHandler Vector54 // RCC
31
#define EXTI0_IRQHandler Vector58 // EXTI Line0
32
#define EXTI1_IRQHandler Vector5C // EXTI Line1
33
#define EXTI2_IRQHandler Vector60 // EXTI Line2
34
#define EXTI3_IRQHandler Vector64 // EXTI Line3
35
#define EXTI4_IRQHandler Vector68 // EXTI Line4
36
#define DMA1_Stream0_IRQHandler Vector6C // DMA1 Stream 0
37
#define DMA1_Stream1_IRQHandler Vector70 // DMA1 Stream 1
38
#define DMA1_Stream2_IRQHandler Vector74 // DMA1 Stream 2
39
#define DMA1_Stream3_IRQHandler Vector78 // DMA1 Stream 3
40
#define DMA1_Stream4_IRQHandler Vector7C // DMA1 Stream 4
41
#define DMA1_Stream5_IRQHandler Vector80 // DMA1 Stream 5
42
#define DMA1_Stream6_IRQHandler Vector84 // DMA1 Stream 6
43
#define ADC_IRQHandler Vector88 // ADC1, ADC2 and ADC3s
44
#define CAN1_TX_IRQHandler Vector8C // CAN1 TX
45
#define CAN1_RX0_IRQHandler Vector90 // CAN1 RX0
46
#define CAN1_RX1_IRQHandler Vector94 // CAN1 RX1
47
#define CAN1_SCE_IRQHandler Vector98 // CAN1 SCE
48
#define EXTI9_5_IRQHandler Vector9C // External Line[9:5]s
49
#define TIM1_BRK_TIM9_IRQHandler VectorA0 // TIM1 Break and TIM9
50
#define TIM1_UP_TIM10_IRQHandler VectorA4 // TIM1 Update and TIM10
51
#define TIM1_TRG_COM_TIM11_IRQHandler VectorA8 // TIM1 Trigger and Commutation and TIM11
52
#define TIM1_CC_IRQHandler VectorAC // TIM1 Capture Compare
53
#define TIM2_IRQHandler VectorB0 // TIM2
54
#define TIM3_IRQHandler VectorB4 // TIM3
55
#define TIM4_IRQHandler VectorB8 // TIM4
56
#define I2C1_EV_IRQHandler VectorBC // I2C1 Event
57
#define I2C1_ER_IRQHandler VectorC0 // I2C1 Error
58
#define I2C2_EV_IRQHandler VectorC4 // I2C2 Event
59
#define I2C2_ER_IRQHandler VectorC8 // I2C2 Error
60
#define SPI1_IRQHandler VectorCC // SPI1
61
#define SPI2_IRQHandler VectorD0 // SPI2
62
#define USART1_IRQHandler VectorD4 // USART1
63
#define USART2_IRQHandler VectorD8 // USART2
64
#define USART3_IRQHandler VectorDC // USART3
65
#define EXTI15_10_IRQHandler VectorE0 // External Line[15:10]s
66
#define RTC_Alarm_IRQHandler VectorE4 // RTC Alarm (A and B) through EXTI Line
67
#define OTG_FS_WKUP_IRQHandler VectorE8 // USB OTG FS Wakeup through EXTI line
68
#define TIM8_BRK_TIM12_IRQHandler VectorEC // TIM8 Break and TIM12
69
#define TIM8_UP_TIM13_IRQHandler VectorF0 // TIM8 Update and TIM13
70
#define TIM8_TRG_COM_TIM14_IRQHandler VectorF4 // TIM8 Trigger and Commutation and TIM14
71
#define TIM8_CC_IRQHandler VectorF8 // TIM8 Capture Compare
72
#define DMA1_Stream7_IRQHandler VectorFC // DMA1 Stream7
73
#define FSMC_IRQHandler Vector100 // FSMC
74
#define SDIO_IRQHandler Vector104 // SDIO
75
#define TIM5_IRQHandler Vector108 // TIM5
76
#define SPI3_IRQHandler Vector10C // SPI3
77
#define USART4_IRQHandler Vector110 // UART4
78
#define USART5_IRQHandler Vector114 // UART5
79
#define TIM6_DAC_IRQHandler Vector118 // TIM6 and DAC1&2 underrun errors
80
#define TIM7_IRQHandler Vector11C // TIM7
81
#define DMA2_Stream0_IRQHandler Vector120 // DMA2 Stream 0
82
#define DMA2_Stream1_IRQHandler Vector124 // DMA2 Stream 1
83
#define DMA2_Stream2_IRQHandler Vector128 // DMA2 Stream 2
84
#define DMA2_Stream3_IRQHandler Vector12C // DMA2 Stream 3
85
#define DMA2_Stream4_IRQHandler Vector130 // DMA2 Stream 4
86
#define ETH_IRQHandler Vector134 // Ethernet
87
#define ETH_WKUP_IRQHandler Vector138 // Ethernet Wakeup through EXTI line
88
#define CAN2_TX_IRQHandler Vector13C // CAN2 TX
89
#define CAN2_RX0_IRQHandler Vector140 // CAN2 RX0
90
#define CAN2_RX1_IRQHandler Vector144 // CAN2 RX1
91
#define CAN2_SCE_IRQHandler Vector148 // CAN2 SCE
92
#define OTG_FS_IRQHandler Vector14C // USB OTG FS
93
#define DMA2_Stream5_IRQHandler Vector150 // DMA2 Stream 5
94
#define DMA2_Stream6_IRQHandler Vector154 // DMA2 Stream 6
95
#define DMA2_Stream7_IRQHandler Vector158 // DMA2 Stream 7
96
#define USART6_IRQHandler Vector15C // USART6
97
#define I2C3_EV_IRQHandler Vector160 // I2C3 event
98
#define I2C3_ER_IRQHandler Vector164 // I2C3 error
99
#define OTG_HS_EP1_OUT_IRQHandler Vector168 // USB OTG HS End Point 1 Out
100
#define OTG_HS_EP1_IN_IRQHandler Vector16C // USB OTG HS End Point 1 In
101
#define OTG_HS_WKUP_IRQHandler Vector170 // USB OTG HS Wakeup through EXTI
102
#define OTG_HS_IRQHandler Vector174 // USB OTG HS
103
#define DCMI_IRQHandler Vector178 // DCMI
104
#define CRYP_IRQHandler Vector17C // CRYP crypto
105
#define HASH_RNG_IRQHandler Vector180 // Hash and Rng
106
#define FPU_IRQHandler Vector184 // FPU
107
108
#endif
/* PIOS_CHIBIOS_TRANSITION_PRIV_H_ */
flight
PiOS
STM32F4xx
inc
pios_chibios_transition_priv.h
Generated by
1.8.6